NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To reduce variations of initial characteristics of memory cells in a NAND type nonvolatile memory formed in the multistage configuration in which the memory cells are stacked. SOLUTION: The memory device includes a lower semiconductor layer 100, a cell string CS100 composed of...

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1. Verfasser: SAWAMURA KENJI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce variations of initial characteristics of memory cells in a NAND type nonvolatile memory formed in the multistage configuration in which the memory cells are stacked. SOLUTION: The memory device includes a lower semiconductor layer 100, a cell string CS100 composed of a plurality of memory cells M100 to M116 formed on the lower semiconductor layer 100, an upper semiconductor layer 200 formed on the lower semiconductor layer 100, and a cell string CS200 which is composed of a plurality of memory cells M200 to M216 formed on the upper semiconductor layer 200. Upon data write and read operations, the memory cell M208 formed on a crystal defect 50a of the upper semiconductor layer 200 is operated as a dummy cell out of the plurality of memory cells M200 to M216 constituting the cell string CS200. COPYRIGHT: (C)2011,JPO&INPIT