FOUR-PHASE CLOCK DRIVEN CHARGE PUMP CIRCUIT
PROBLEM TO BE SOLVED: To avoid breakdown of elements caused by application of a high voltage. SOLUTION: A four-phase clock driven charge pump circuit includes capacitors C1-C(n-3), Cp1-Cp3 with one end of them to be connected, respectively, to the connective points of Nch transistors T1-T(n+1) conne...
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Zusammenfassung: | PROBLEM TO BE SOLVED: To avoid breakdown of elements caused by application of a high voltage. SOLUTION: A four-phase clock driven charge pump circuit includes capacitors C1-C(n-3), Cp1-Cp3 with one end of them to be connected, respectively, to the connective points of Nch transistors T1-T(n+1) connected in series and capacitors Cs1-Csn, Cq with one end of them to be connected, respectively, to the gates of Nch transistors T1-T(n+1). The voltage having an amplitude equal to the amplitude Vcc of a clock signal obtained through the use of a quadruple booster circuit after quadruplicating the amplitude Vcc is supplied to the other end of the capacitors C1-C(n-3). The voltage having an amplitude equal to the amplitude Vcc obtained through the use of a double booster circuit after doubling the amplitude Vcc is supplied to the other end of the capacitor Cp. The voltage having an amplitude equal to the amplitude Vcc obtained through the use of the quadruple booster circuit after quadruplicating the amplitude Vcc is supplied to the other end of the capacitors Cs1-Cs(n-3). The voltage having an amplitude equal to the amplitude Vcc obtained through the use of the quadruple booster circuit after quadruplicating the amplitude Vcc is supplied to the other end of the capacitor Cq. COPYRIGHT: (C)2010,JPO&INPIT |
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