VIRTUAL TEST SYSTEM CORRESPONDING TO SIMULTANEOUS TEST OF A PLURALITY OF DEVICE UNDER-TESTS (DUT)

PROBLEM TO BE SOLVED: To sufficiently debug an accurate test program. SOLUTION: A virtual test system includes: a plurality of semiconductor operation simulation models 201-1 to 201-32 provided corresponding to a plurality of the device under-tests (DUT); an operation simulation model 101 of an LSI tester for simultaneously testing the plurality of DUTs; and signal delay models 301-1 to 301-32 on a test board mounting the plurality of DUTs. The virtual test system adds the signal delay models 301-1 to 301-32 corresponding to signal lines on the test board to the signal lines connecting the plurality of the semiconductor operation simulation models 201-1 to 201-32 and the operation simulation model 101 of the LSI tester. COPYRIGHT: (C)2010,JPO&INPIT