NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device which has a plurality of cores which form an aggregate of blocks being a unit of data erasure, and enables the simultaneous implementation of data writing or erasure operation at an optional core and data reading operation at...

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Bibliographische Detailangaben
Hauptverfasser: KURIYAMA MASAO, HIRAMATSU TATSUYA, SAITO SAKATOSHI, HARA NORIMASA, IKEDA HISAFUMI, HONDA YASUHIKO, KATO HIDEO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device which has a plurality of cores which form an aggregate of blocks being a unit of data erasure, and enables the simultaneous implementation of data writing or erasure operation at an optional core and data reading operation at the other optional core. SOLUTION: The nonvolatile semiconductor memory device has a data comparing circuit 403a which compares a current of a data line DLa selected at the verification reading operation of data writing/erasure at a memory cell array 401a with a current of a reference signal line REFa, a data comparing circuit 403b which compares a current of a data line DLb selected at normal data reading operation at the memory cell array 401b with the current of the reference signal line REFb, a dummy column gates 404a and 404b which feed constant currents to the reference signal lines REFa and REFb, and one current source 406 which drives the dummy column gates 404a and 404b in parallel. COPYRIGHT: (C)2010,JPO&INPIT