SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a technique which is less apt to cause film peeling in a package process and an environmental test, etc. for a semiconductor device of multi-layer wiring structure. SOLUTION: This semiconductor device includes: a lower-wiring layer, wherein a wiring layer is configur...

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Bibliographische Detailangaben
Hauptverfasser: KAWAMOTO YOSHIFUMI, TAKIMOTO YOSHIO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a technique which is less apt to cause film peeling in a package process and an environmental test, etc. for a semiconductor device of multi-layer wiring structure. SOLUTION: This semiconductor device includes: a lower-wiring layer, wherein a wiring layer is configured in an insulating layer; an inter-layer insulating layer provided on the lower wiring layer; an upper wiring layer, provided on the inter-layer insulating layer, wherein a wiring layer is configured in an insulating layer; and a connection layer which is configured in the inter-layer insulating layer to electrically connect the wiring layer of the lower-wiring layer and the wiring layer of the upper-wiring layer. An embedded layer A15, which connects to the upper layer and/or the lower layer of the inter-layer insulating layer A7, is constituted in the inter-layer insulating layer A7, an average elastic modulus of the inter-layer insulating layer A7 containing the embedded layer A15 and the connection layer A12 is greater than or equal to 10 GPa. COPYRIGHT: (C)2010,JPO&INPIT