NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device in which voltage stress caused in a transfer register for transferring high voltage used during write operation or the like can be relaxed. SOLUTION: A memory cell group which has a plurality of memory cells MC including a floating gate and a control gate and in which current paths of a plurality of memory cells MC are connected in series is formed. Transfer transistors TR0 to TR63 are connected to control gates of memory cells MC of the memory cell group. When voltage VPASS being higher than power source voltage VCC and lower than write voltage VPGM is applied to the control gate of the memory cell of non-selection during write operation, voltage VRDEC being higher than voltage VPASS and not more than write voltage VPGM are applied to the gate of the transfer transistor. COPYRIGHT: (C)2010,JPO&INPIT