ANALOG PHASE-LOCKED LOOP SYSTEM

PROBLEM TO BE SOLVED: To provide an analog type-III phase-locked loop system which is single, stable and reliable. SOLUTION: A phase detector 2 generates an error signal 12 which indicates a phase difference between an input reference signal 4 and an output signal 6. A selector 14 supplies the error signal to a first signal path 8 when selecting a first bandwidth parameter value, and supplies the error signal to a second signal path 10 when selecting a second bandwidth parameter value. The first signal path has a first integrator 16 for integrating the error signal, a second integrator 18 for integrating the integration signal and generating an error voltage signal, and a voltage control oscillator 20 for generating a first signal path output signal responding to the error voltage signal. The second signal path also has integrators 22 and 24 and a voltage control oscillator 26 of the same kind. A selector 28 selects a VCO20 output when selecting the first bandwidth parameter value and a VCO26 output when selecting the second bandwidth parameter value. The output signal of the selector 28 is fed back to the phase detector 2. COPYRIGHT: (C)2010,JPO&INPIT