CONNECTION CHECKING METHOD, PROGRAMMABLE DEVICE, AND CIRCUIT STRUCTURE FILE GENERATION PROGRAM

PROBLEM TO BE SOLVED: To provide a connection checking method capable of easily checking the connection among a plurality of FPGAs connected mutually via a slot on a backboard, and to provide a programmable device and a circuit structure file generation program therefor. SOLUTION: Each FPGA outputs terminal data capable of identifying an output terminal from the output terminal that each FPGA itself has, and determines whether received terminal data are identical to comparison data corresponding to an input terminal for receiving the terminal data when the terminal data are inputted to the input terminal, and displays the determination result at a prescribed result display section. COPYRIGHT: (C)2010,JPO&INPIT