DATA PHASE ADJUSTMENT CIRCUIT AND DATA PHASE ADJUSTING METHOD

PROBLEM TO BE SOLVED: To adjust the phase relation between a transmitted clock signal and data signal into an appropriate relation. SOLUTION: A delay circuit 200 delays a data signal transmitted by a data input line 101, while synchronizing the data signal, with a clock signal transmitted by a clock input line 102 and outputs the data signal as a delayed data signal to a delay data line 201 by prescribed delayed time. A delay control part 300 controls the delay time so as to change the logical level of the delay data signal between a time earlier than an appearance time of an non-read out edge being an edge that is not a read out edge-defining timing for reading a logical level of the data signal in edges of the clock signal only by a prescribed offset time, and a time earlier than the appearance time of the first read out edge, following the non-read out edge only by the prescribed offset time. COPYRIGHT: (C)2009,JPO&INPIT