NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND DEPLETION TYPE MOS TRANSISTOR

PROBLEM TO BE SOLVED: To vary an intrinsic breakdown voltage and a soft breakdown voltage without varying the area of a transistor. SOLUTION: A peripheral circuit for driving a memory cell transistor in a memory cell array includes at least a first transistor. The first transistor includes a gate electrode 26 formed on a surface of a semiconductor substrate 1 with a gate insulating film 25 interposed, a channel region 22 formed right below the gate electrode 26, a source-drain diffusion region 21 formed in a manner of self-matching with the gate electrode 26, and an overlap region 24 formed right below the gate electrode 26 that the channel region 22 and source-drain diffusion region 21 overlap with. COPYRIGHT: (C)2009,JPO&INPIT