NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device with good retention resistance. SOLUTION: A single memory cell MC has a conductive charge storage layer and an insulative charge storage layer ECS. The conductive charge storage layer is a first gate electrode layer GE1 havin...

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1. Verfasser: ASHIDA MOTOI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device with good retention resistance. SOLUTION: A single memory cell MC has a conductive charge storage layer and an insulative charge storage layer ECS. The conductive charge storage layer is a first gate electrode layer GE1 having floating potential, and is formed on a principal plane of a semiconductor substrate SUB sandwiched between a pair of source/drain regions SD via a first gate insulation layer GI1. The insulative charge storage layer ECS is included in a second gate insulation layer GI2 and formed on the principal plane of the semiconductor substrate SUB sandwiched between the pair of source/drain regions SD. A control gate part CG on the first gate electrode layer GE1 and a memory gate part MG on the second gate insulation layer GI2 are electrically connected with each other. COPYRIGHT: (C)2009,JPO&INPIT