CHARGE PUMP CIRCUIT

PROBLEM TO BE SOLVED: To provide a charge pump circuit reducing the area of a used capacitor, compared with a conventional technique. SOLUTION: When an input terminal 101 has a voltage 0, the output voltage of an pulse voltage step-up circuit 102 becomes 0, and a capacitor 106 is charged with a powe...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MATOBA SHINJI, CHIN GIYOUSHIYOU, ASANO MASAMICHI, OKAMURA SHUJI, TOKUNAGA TOMOSHI
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a charge pump circuit reducing the area of a used capacitor, compared with a conventional technique. SOLUTION: When an input terminal 101 has a voltage 0, the output voltage of an pulse voltage step-up circuit 102 becomes 0, and a capacitor 106 is charged with a power supply voltage Vcc via an FET 110. Here, the forward drop voltage of the FET is not considered. Then, when the input terminal 101 has a voltage Vcc, the output voltage of the pulse step-up circuit 102 is a voltage 2Vcc, and the voltage of a point C1 is 3Vcc. At this time, the voltage of an inverter 103 is 0, and the output voltage of the pulse voltage step-up circuit 104 is 0. As a result, a capacitor 107 is charged with a voltage 3Vcc. Then, when the voltage of the input terminal 101 is 0, the output of the inverter 103 is a voltage Vcc, the output voltage of the pulse voltage step-up circuit 104 is 2Vcc, and the voltage of the point C2 is 5Vcc. The voltage of a point C2 is outputted through the FET 112. COPYRIGHT: (C)2009,JPO&INPIT