ELECTRONIC SUBSTRATE

PROBLEM TO BE SOLVED: To effectively use resources by forming a wiring pattern for test at a blank part on a substrate. SOLUTION: The wiring pattern 111 for test is formed in a test region (the blank part) 102 on the substrate 100, and a real wiring pattern 2 is formed in a product region 101. Pins...

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1. Verfasser: OTSUKI YASUO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To effectively use resources by forming a wiring pattern for test at a blank part on a substrate. SOLUTION: The wiring pattern 111 for test is formed in a test region (the blank part) 102 on the substrate 100, and a real wiring pattern 2 is formed in a product region 101. Pins 5 and 6 are fitted to both ends of the wiring pattern 111 for test respectively and impedance etc., is measured by supplying a current to evaluate the pattern 111 for test. When it is evaluated that the wiring pattern 111 for test reaches a reference level for shipment as a product, the test region 102 is cut from the substrate 100 and the remaining product region 101 is shipped as the product. COPYRIGHT: (C)2009,JPO&INPIT