GATE DRIVING CIRCUIT AND DISPLAY DEVICE DRIVING CIRCUIT

PROBLEM TO BE SOLVED: To provide a gate driving circuit capable of high-speed switching without raising VDD voltage. SOLUTION: An INV10 which is connected with a gate of an output element N31 and drives the N31 is connected with a low voltage source terminal VDD via a PMOS21 driven by a control signal (b) produced by an INV20 which delays a control signal (a) by a prescribed time and inversely outputs the control signal (a). When the control signal (a) is turned ON, the INV10 turns the N31 ON and the VDD is applied to the gate of the N31. About the time when a gate potential of the N31 comes to a potential equal to the VDD, that is, after the elapse of the delay time of the INV20, the INV20 changes the control signal (b) from ON to OFF. The control signal (b) outputted by the INV20 becomes OFF, the PMOS is turned OFF and the connection between the VDD and the INV10 is separated. COPYRIGHT: (C)2009,JPO&INPIT