SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a semiconductor apparatus and a method of manufacturing the same, capable of reducing the parasitic capacitance of an element isolation region that has a deep trench isolation (DTI) shape. SOLUTION: An element isolation region is formed on a semiconductor substrate 1...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SAKAMOTO TOSHIHIRO, KITAHARA HIROYOSHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor apparatus and a method of manufacturing the same, capable of reducing the parasitic capacitance of an element isolation region that has a deep trench isolation (DTI) shape. SOLUTION: An element isolation region is formed on a semiconductor substrate 10, on which a high concentration impurity diffusion semiconductor layer 1 and a semiconductor active layer 2 are laminated. The element isolation region is a deep trench 15, consisting of a forward taper profile 13 and a bowing profile connecting to a lower part, and a boundary surface between the forward taper profile 13, and the bowing profile is arranged in the high concentration impurity diffusion semiconductor layer 1. An oxide film is buried in the deep trench 15, and the bowing profile has voids 17. A bottom part of the bowing profile enters into the silicon semiconductor substrate, beyond the high concentration impurity diffusion semiconductor layer and improves the leakage characteristics of the element isolation region. COPYRIGHT: (C)2009,JPO&INPIT