DATA TRANSFER CONTROL DEVICE AND ELECTRONIC DEVICE

PROBLEM TO BE SOLVED: To provide a small-scale data transfer control device or the like certainly avoiding assertion timing violation or the like of an IORDY signal to materialize a bridge function of parallel ATA (AT Attachment) and serial ATA (Serial AT Attachment). SOLUTION: The data transfer con...

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1. Verfasser: MATSUDA KUNIAKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a small-scale data transfer control device or the like certainly avoiding assertion timing violation or the like of an IORDY signal to materialize a bridge function of parallel ATA (AT Attachment) and serial ATA (Serial AT Attachment). SOLUTION: The data transfer control device includes: a PATA (Parallel AT Attachment) I/F 10 connected to PATA bus; an SATA I/F 50 connected to an SATA bus; and a sequence controller 30 performing transfer sequence control. The PATA I/F 10 has a TFR 12. The sequence controller 30 waits until preparation of read data corresponding to one sector from a device 4 is completed after receiving a PIO (Programmed I/O) setup FIS (Frame Information Structure) from the device in time of transfer of PIO read, clears a busy bit of a status register of a task file register after the preparation of the read data is completed, and sets a data request bit. COPYRIGHT: (C)2009,JPO&INPIT