SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To suppress an increase in subthreshold voltage and a reduction in voltage margin accompanying a low-voltage operation of a static memory cell composed of a MOS transistor. SOLUTION: A static memory cell connected to word and data lines is used. A MOS transistor where static memory cells intersect each other to be coupled is configured so as to prevent substantial flowing of a current between a drain and a source even when voltages of a gate and the source are equal. The power-supply node of the static memory cell is connected to a first power supply voltage via a power supply voltage supplying means. The first power supply voltage is larger than a maximum voltage of the data line. The power supply voltage supplying means is configured to stop power supplying to the static memory cell in a static memory cell selected state, and to execute power supplying to the static memory cell in a static memory cell unselected state. COPYRIGHT: (C)2009,JPO&INPIT