SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a semiconductor device having a salicide structure wherein the fine wire resistance of the gate can be improved without deterioration of junction leakage characteristics. SOLUTION: The semiconductor device comprises a gate electrode 13 consisting of a polysilicon fil...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: IWASAKI TOSHIFUMI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator IWASAKI TOSHIFUMI
description PROBLEM TO BE SOLVED: To provide a semiconductor device having a salicide structure wherein the fine wire resistance of the gate can be improved without deterioration of junction leakage characteristics. SOLUTION: The semiconductor device comprises a gate electrode 13 consisting of a polysilicon film 14 and a silicide film 15 which are formed on a silicon substrate 1 via a gate insulation film 12, a diffusion layer 17 in which predetermined conductivity type impurity ions are diffused and which is formed with a channel region below the gate electrode 13 interposed, source and drain regions consisting of a silicide film 18 formed on the surface of the diffusion layer 17. The thickness of the silicide film 15 of the gate electrode 13 is larger than that of the silicide film 18 on the diffusion layer 17. COPYRIGHT: (C)2008,JPO&INPIT
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2008171955A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2008171955A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2008171955A3</originalsourceid><addsrcrecordid>eNrjZDAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8AwJVvB19At1c3QOCQ3y9HNX8HUN8fB34WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYGFobmhpampo7GRCkCAKp3Jx8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><source>esp@cenet</source><creator>IWASAKI TOSHIFUMI</creator><creatorcontrib>IWASAKI TOSHIFUMI</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a semiconductor device having a salicide structure wherein the fine wire resistance of the gate can be improved without deterioration of junction leakage characteristics. SOLUTION: The semiconductor device comprises a gate electrode 13 consisting of a polysilicon film 14 and a silicide film 15 which are formed on a silicon substrate 1 via a gate insulation film 12, a diffusion layer 17 in which predetermined conductivity type impurity ions are diffused and which is formed with a channel region below the gate electrode 13 interposed, source and drain regions consisting of a silicide film 18 formed on the surface of the diffusion layer 17. The thickness of the silicide film 15 of the gate electrode 13 is larger than that of the silicide film 18 on the diffusion layer 17. COPYRIGHT: (C)2008,JPO&amp;INPIT</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20080724&amp;DB=EPODOC&amp;CC=JP&amp;NR=2008171955A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20080724&amp;DB=EPODOC&amp;CC=JP&amp;NR=2008171955A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IWASAKI TOSHIFUMI</creatorcontrib><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><description>PROBLEM TO BE SOLVED: To provide a semiconductor device having a salicide structure wherein the fine wire resistance of the gate can be improved without deterioration of junction leakage characteristics. SOLUTION: The semiconductor device comprises a gate electrode 13 consisting of a polysilicon film 14 and a silicide film 15 which are formed on a silicon substrate 1 via a gate insulation film 12, a diffusion layer 17 in which predetermined conductivity type impurity ions are diffused and which is formed with a channel region below the gate electrode 13 interposed, source and drain regions consisting of a silicide film 18 formed on the surface of the diffusion layer 17. The thickness of the silicide film 15 of the gate electrode 13 is larger than that of the silicide film 18 on the diffusion layer 17. COPYRIGHT: (C)2008,JPO&amp;INPIT</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAMdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HNR8AwJVvB19At1c3QOCQ3y9HNX8HUN8fB34WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYGFobmhpampo7GRCkCAKp3Jx8</recordid><startdate>20080724</startdate><enddate>20080724</enddate><creator>IWASAKI TOSHIFUMI</creator><scope>EVB</scope></search><sort><creationdate>20080724</creationdate><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><author>IWASAKI TOSHIFUMI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2008171955A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>IWASAKI TOSHIFUMI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IWASAKI TOSHIFUMI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD</title><date>2008-07-24</date><risdate>2008</risdate><abstract>PROBLEM TO BE SOLVED: To provide a semiconductor device having a salicide structure wherein the fine wire resistance of the gate can be improved without deterioration of junction leakage characteristics. SOLUTION: The semiconductor device comprises a gate electrode 13 consisting of a polysilicon film 14 and a silicide film 15 which are formed on a silicon substrate 1 via a gate insulation film 12, a diffusion layer 17 in which predetermined conductivity type impurity ions are diffused and which is formed with a channel region below the gate electrode 13 interposed, source and drain regions consisting of a silicide film 18 formed on the surface of the diffusion layer 17. The thickness of the silicide film 15 of the gate electrode 13 is larger than that of the silicide film 18 on the diffusion layer 17. COPYRIGHT: (C)2008,JPO&amp;INPIT</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JP2008171955A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-10T07%3A51%3A36IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=IWASAKI%20TOSHIFUMI&rft.date=2008-07-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2008171955A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true