ARITHMETIC CIRCUIT

PROBLEM TO BE SOLVED: To provide a technique capable of achieving: (1) an arithmetic circuit (accelerator) of good processing efficiency that is capable of dealing with an arithmetical operation for which certain pieces of data are input; and (2) reducing costs by reducing the size of a data register (processing buffer) provided inside the arithmetic circuit. SOLUTION: An arithmetic circuit 103 performs an arithmetical operation for certain pieces of input data in accordance with descriptor control and by means of DMA transfer and outputs the results, in such a way that the certain pieces of input data are not subjected to the arithmetical operation at a time but divided into a plurality of portions for arithmetic processing. The arithmetic circuit 103 temporarily stores the results of the divided arithmetical operation halfway in an external storage device 102 and reads the results for processing during the next arithmetic processing. This process is repeated to obtain the final results. Arithmetical operations are performed in periodic processing units that correspond to the number of address registers 130 provided in the arithmetic circuit 103. COPYRIGHT: (C)2008,JPO&INPIT