PRE-FETCHING MECHANISM OF INSTRUCTION CACHE MEMORY

PROBLEM TO BE SOLVED: To quickly and accurately cope with a cache miss when it occurs and to dispense with a useless memory. SOLUTION: A pre-fetching mechanism is provided with a cache memory part 2 having a cache data storage part 2B and a row address storage part 2A, a row address input part 3 and a miss judgment part 5 for judging the position of a cache miss generated in a cache data. The cache controller 4 is provided with a boundary setting part 11 for setting an optional boundary of a column direction on the cache data stored in the cache data storage part 2B in each cache line in the row direction, a position detection part 12 for detecting a position on which a miss of a row address is generated by comparing a row address inputted from a CPU 1 through the row address input part 3 with a row address of the optional boundary set by the boundary setting part 11, and a cache data speculative replacement part 13 for speculatively replacing the cache data of a cache line generating the row address miss and that of the succeeding cache line when positions P1, P2 on which the detected cache miss is generated are located behind the boundary 2D (2E). COPYRIGHT: (C)2008,JPO&INPIT