FUNCTION VERIFICATION SYSTEM AND FUNCTION VERIFICATION METHOD

FUNCTION VERIFICATION SYSTEM AND FUNCTION VERIFICATION METHOD

PROBLEM TO BE SOLVED: To solve the problem that since there are many examination items necessary for the setting of coverage points, man-hours necessary for examination are large, and the room of the deterioration of verification quality due to the error of examination is large in the random verific...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: HANAKI YOSHITAKA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To solve the problem that since there are many examination items necessary for the setting of coverage points, man-hours necessary for examination are large, and the room of the deterioration of verification quality due to the error of examination is large in the random verification system of a digital circuit. SOLUTION: This function verification system is characterized in to extract coverage points from constraint conditions defined by the specifications of a digital circuit. COPYRIGHT: (C)2008,JPO&INPIT