NAND FLASH MEMORY DEVICE AND MANUFACTURING METHOD THEREFOR

PROBLEM TO BE SOLVED: To provide a NAND flash memory device comprising memory cells, etc. arrayed in a three-dimensional method, and to provide its manufacturing method. SOLUTION: This device includes a lower semiconductor layer 100; at least one upper semiconductor layer 200, arranged on the lower semiconductor layer 100; a drain region, etc. and a source region, etc. formed in predetermined regions of each of the lower and upper semiconductor layers 100 and 200; gate structures 120 and 220, arranged at the upper part of each of the lower and upper semiconductor layers 100 and 200; a plug, etc. of a bit line BL in contact with the drain region, etc.; and the bit lines, etc. which are arranged at the upper part of the upper semiconductor layer 200, while being in contact with each of the plugs of the bit lines. In this case, the upper semiconductor layer 200 has a drain penetrating part 501, formed at the upper part of the drain region 110D of the lower semiconductor layer 100, and each of the plugs, etc. of the bit lines BL is brought into contact with each of the drain region, etc. formed in the lower semiconductor layer 100 penetrating the drain penetrating part 501. COPYRIGHT: (C)2008,JPO&INPIT