SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To form a high-concentration impurity diffusion region, and to provide measures against dishing in CMP treatment without adding any photolithography processes with a configuration, where transistors having gate insulation films with different film thicknesses are provided and a...

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1. Verfasser: IIZUKA HIROHISA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To form a high-concentration impurity diffusion region, and to provide measures against dishing in CMP treatment without adding any photolithography processes with a configuration, where transistors having gate insulation films with different film thicknesses are provided and a guard ring is provided around an element formation region. SOLUTION: A gate oxide film 8 is formed at a part for forming the memory cell transistor in a memory cell region 1 of a silicon substrate 3; and a gate oxide film 12 and the gate oxide film 8 are formed at a region requiring a high breakdown voltage of a peripheral circuit region 2 and at a part corresponding to a high-concentration impurity region, respectively. A thick gate oxide film 12 is formed at the part of a guard ring 15, and the thin gate oxide film 8 is formed at guard rings 16, 17. With this configuration, the occurrence of dishing when forming STI 14 is suppressed, etching treatment of the oxide films can be abbreviated in a process for introducing high-concentration impurities, and introduction to the guard rings 16, 17 can also be made. COPYRIGHT: (C)2008,JPO&INPIT