DEDICATED MECHANISM FOR PAGE MAPPING IN GPU

PROBLEM TO BE SOLVED: To provide a circuit, method, and device for reducing or eliminating a system memory access for searching address translation information. SOLUTION: In one example, these accesses are reduced or eliminated by previously storing an entry used for translating a virtual address used in the GPU into a physical address used in a system memory in a graphics TLB. Translation information is maintained by locking or restricting the entry in the graphics TLB required for a display access. This is achieved by restricting an access to a specific location of the graphics TLB by storing a flag or other identification information in the graphics TLB or by other appropriate method. COPYRIGHT: (C)2008,JPO&INPIT