STRIP FORMAT OF SEMICONDUCTOR PACKAGE SUBSTRATE AND PANEL ARRAY

PROBLEM TO BE SOLVED: To provide a strip format of a semiconductor package in which the number of strip formats mounted on a panel is increased and connection relation between the strip formats is further improved. SOLUTION: The strip format 100 comprises a package region 110 on which a semiconducto...

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Hauptverfasser:	KIM WON HEE, CHOI BONG KYU, KANG TAE HYEOG, SHIM KYU HYUN, HWANG KYU IL, YOUM KWANG SEOP
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To provide a strip format of a semiconductor package in which the number of strip formats mounted on a panel is increased and connection relation between the strip formats is further improved. SOLUTION: The strip format 100 comprises a package region 110 on which a semiconductor element is mounted to form an outer layer circuit pattern, and a dummy region 120 formed to enclose the package region. In the dummy region on one side surface, a trapezoidal projection 130 and a curved part 140, cut out in trapezoid, are continuously formed. In the dummy region on the other side surface, a curved part 150, being cutout in trapezoid, is formed at the part corresponding to the trapezoidal projection 130, and a trapezoidal projection 160 is formed at the part corresponding to the curved part 140 cut out in trapezoid. COPYRIGHT: (C)2008,JPO&INPIT