MEMORY BUS LOAD ADJUSTMENT DEVICE

PROBLEM TO BE SOLVED: To provide a memory bus load adjustment device allowing efficient share of a shared memory by efficiently reading data stored in each input side memory and storing them into the shared memory, and efficiently outputting the data stored in the shared memory to an output side mem...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	KONDOU TAKESHI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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