FIELD PROGRAMMABLE GATE ARRAY

FIELD PROGRAMMABLE GATE ARRAY

PROBLEM TO BE SOLVED: To decrease the number of components and to lower the manufacturing cost by simplifying the constitution of a peripheral circuit. SOLUTION: An FPGA 10 which is loaded with configuration data from an ROM 20 and structures and executes a logic circuit, corresponding to the loaded...

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Bibliographische Detailangaben
1. Verfasser: MISUMI AKIRA
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To decrease the number of components and to lower the manufacturing cost by simplifying the constitution of a peripheral circuit. SOLUTION: An FPGA 10 which is loaded with configuration data from an ROM 20 and structures and executes a logic circuit, corresponding to the loaded configuration data includes a monitor section 14, which monitors whether the voltage Vcc of electric power supplied to the FPGA 10 exceeds a predetermined operation threshold Vth and a loading instruction section 15, which instructs new loading of configuration data from the ROM 20 once informed by the monitor part 14 that the voltage Vcc drops below the operation threshold Vth. COPYRIGHT: (C)2007,JPO&INPIT