SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS INSPECTION METHOD

PROBLEM TO BE SOLVED: To detect simply and accurately whether a program of fuses is performed correctly or not, in a short time. SOLUTION: A chip is provided with an SRAM 1 in which a defective cell can be replaced by a redundancy cell, a fuse data transfer circuit 2 outputting information about the...

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Bibliographische Detailangaben
Hauptverfasser: KUSHIYAMA NATSUKI, IWASA SHIGEAKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To detect simply and accurately whether a program of fuses is performed correctly or not, in a short time. SOLUTION: A chip is provided with an SRAM 1 in which a defective cell can be replaced by a redundancy cell, a fuse data transfer circuit 2 outputting information about the program (blow) of a plurality of fuses in the chip, shift registers 3, 4, a shift clock generating circuit 5, and a reset signal generating circuit 6. Since a CRC code storing part 13 storing CRC code information generated based on chip ID and redundancy information, and a CRC surplus calculating circuit 14 detecting whether an error is included in the chip ID, redundancy information and CRC code information or not are provided, it can be detected simply and accurately whether a desired fuse is programmed correctly or not. COPYRIGHT: (C)2007,JPO&INPIT