NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND ITS DATA ERASING METHOD

PROBLEM TO BE SOLVED: To reduce a period of data erasing operation of a flash memory. SOLUTION: The flash memory of which the data are collectively erased in a block unit with respect to a memory cell array wherein the blocks including a plurality of memory cells are arranged, is equipped with: a fi...

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1. Verfasser: FUJIMOTO HIROMASA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce a period of data erasing operation of a flash memory. SOLUTION: The flash memory of which the data are collectively erased in a block unit with respect to a memory cell array wherein the blocks including a plurality of memory cells are arranged, is equipped with: a first step to collectively erase the data by applying erase voltages to the memory cells in the block; a second step to confirm whether the memory cell having the threshold higher than a first voltage EV does not exist with respect to the memory cells in the block; a third step, when the memory cell having the threshold higher than the EV exists as the result of above confirmation, to confirm whether the memory cell having the threshold higher than the EV does not exist, by changing the erase voltage at least once among from its initial value to the maximum value and collectively erasing them; and a fourth step, when the memory cell having the threshold higher than the EV exists as the above result, to confirm whether the memory cell having the threshold higher than the EV does not exist, by collectively erasing the erase voltage while keeping the maximum value after the erase voltage value becomes maximum. COPYRIGHT: (C)2007,JPO&INPIT