SERIAL INTERRUPT RESUMING CIRCUIT

PROBLEM TO BE SOLVED: To provide a serial interrupt resuming circuit capable of reducing wasteful consumption of power, and performing high-speed reception regardless of performance of a CPU, in a system resuming peripheral equipment from a stop state by serial data from the outside. SOLUTION: This serial interrupt resuming circuit has a reception shift register 102, a reception control circuit 101, a resume request setting register 107, a comparison circuit 109, an interrupt generation circuit 114, a reception interrupt resuming control circuit 106, and a clock control circuit 105. Thereby, the CPU 116 can be stopped in reception standby, reception operation, and resume request data comparison operation, wasteful CPU operation can be reduced, and the wasteful consumption of the power can be reduced. The reception operation can be achieved regardless of CPU operation, so that the high-speed reception can be stably performed regardless of the performance of the CPU. COPYRIGHT: (C)2007,JPO&INPIT