METHOD AND STRUCTURE FOR REDUCING WARPAGE OF SUBSTRATE

PROBLEM TO BE SOLVED: To realize good soldering, high-density mounting, and reliability by reducing the warpage of a substrate when soldering electronic parts on it. SOLUTION: A warpage reducing member 5 is jointed to the portion on the rear surface of mounting region of a component 2, which is the...

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Hauptverfasser: TSUBONE KENICHIRO, MISHIRO KINUKO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To realize good soldering, high-density mounting, and reliability by reducing the warpage of a substrate when soldering electronic parts on it. SOLUTION: A warpage reducing member 5 is jointed to the portion on the rear surface of mounting region of a component 2, which is the portion of a substrate 1 where warpage is desired to be reduced, for reducing the warpage of the substrate 1 on which a plurality of components 2 and 3 are mounted. A warpage reducing member 5 comprising an opening 7 has the external dimension similar to that of the component 2, and is jointed to the substrate 1 using a jointing material 6 whose melting point is lower than a solder connection part 4 of the components 2 and 3. Mounting of the warpage reducing member 5 on the substrate 1 is performed in the process identical with a normal soldering mounting process of the component 3. COPYRIGHT: (C)2007,JPO&INPIT