METHOD FOR CALCULATING DELAY TIME OF SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To shorten the calculation processing time of each cell delay time in a semiconductor integrated circuit without increasing processor speed. SOLUTION: A plurality of clock source points in the semiconductor integrated circuit are extracted in step S100, and a cell belonging to...

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Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To shorten the calculation processing time of each cell delay time in a semiconductor integrated circuit without increasing processor speed. SOLUTION: A plurality of clock source points in the semiconductor integrated circuit are extracted in step S100, and a cell belonging to each clock source point is extracted as a clock domain in step S101. A plurality of extracted clock domains are assigned to a plurality processor elements so that they are assigned to different processor elements in step S102, and the cell delay time of each cell belonging to each clock domain is calculated in parallel using the plurality of processor elements in step S103. COPYRIGHT: (C)2007,JPO&INPIT