SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To reduce circuit scale and power consumption by facilitating timing design for simultaneous interrupt handling between a plurality of circuit blocks of high speed operation. SOLUTION: A semiconductor device has a clock signal generation circuit 5, and the plurality of circuit...

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Bibliographische Detailangaben
Hauptverfasser:	TSUGE MASATOSHI, USUKINU TATSUNORI, SUZUKI KAZUHISA
Format:	Patent
Sprache:	eng
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To reduce circuit scale and power consumption by facilitating timing design for simultaneous interrupt handling between a plurality of circuit blocks of high speed operation. SOLUTION: A semiconductor device has a clock signal generation circuit 5, and the plurality of circuit blocks 6 operated in synchronism with a clock signal clk. The plurality of circuit blocks are each reset on receiving an interrupt signal reset_in output in synchronism with the clock signal in a frequency locking process. A timing margin is thus significantly improved. COPYRIGHT: (C)2007,JPO&INPIT