METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a method for inhibiting excessive etching in the vicinity of a gate electrode. SOLUTION: An amorphous carbon layer 46 is formed on a substrate on which layers 43 and 44 to be etched are formed. A resist pattern 47 patterned in a predetermined region is formed on the...

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Bibliographische Detailangaben
Hauptverfasser: KOBAYASHI MASAHARU, YAO TERUYOSHI, HASHIMOTO KOICHI, NAORI NOBUHISA, OSHIMA MASASHI, KAWAMURA EIICHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a method for inhibiting excessive etching in the vicinity of a gate electrode. SOLUTION: An amorphous carbon layer 46 is formed on a substrate on which layers 43 and 44 to be etched are formed. A resist pattern 47 patterned in a predetermined region is formed on the surface of the amorphous carbon layer 46. The amorphous carbon layer and the upper part of the layers to be patterned except at least the layer 43 of the lower part of the layers are etched by using the resist pattern 47 as a mask. Thereafter, the resist pattern 47 is removed. Furthermore, at least the layer 43 of the lower part of the layers to be patterned is etched selectively by using the amorphous carbon layer 46 as a mask. COPYRIGHT: (C)2007,JPO&INPIT