SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a parasitic capacity associated with wiring led out of an electrode on the high impedance side is reduced. SOLUTION: In this semiconductor integrated circuit, the first wiring in an n-th (n denotes a natural number) wiring l...

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Bibliographische Detailangaben
Hauptverfasser: MIKI YOSHIFUMI, MINAMI YOSHIHISA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a parasitic capacity associated with wiring led out of an electrode on the high impedance side is reduced. SOLUTION: In this semiconductor integrated circuit, the first wiring in an n-th (n denotes a natural number) wiring layer connected to one electrode of a capacitive element is formed under the second wiring in an (n+1)-th wiring layer connected to the other electrode of the capacitive element. The wiring width of the second wiring is made not larger than that of the first wiring, and the first wiring is connected to the input terminal and the second wiring is connected to the output terminal. COPYRIGHT: (C)2007,JPO&INPIT