SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To improve a data read rate in a semiconductor memory. SOLUTION: A buffer circuit of a CMOS configuration is connected between an output node N2 of a flip-flop circuit of a CMOS configuration and a 2nd bit line BL_R for reading data, and also a pair of control nodes N5, N6 of the buffer circuit is connected to a pair of word lines WL, /WL, respectively. Thus, it is made possible to read out a data from a memory cell 10 in the state in which the output node N2 of the flip-flop circuit is separated from the 2nd bit line BL_R. COPYRIGHT: (C)2007,JPO&INPIT