INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To efficiently conceal refreshing operation in a DRAM. SOLUTION: Memory design includes a low-cost DRAM memory cell that is obtained by a static random access memory (SRAM)-compatible highly-useful memory array and method that employs a dynamic random access memory (DRAM) (300) in relation with a single DRAM cache (308) and a tag (324). There is also provided the memory design that can use a 100% of a time for system access, and can perform refreshing at frequencies sufficient for preventing a data loss. An arbitrary sub-array (304) in the memory (300) can perform reading or writing form the outside of the other arbitrary sub-array (304), and writing or refreshing from the cache (308) is also possible. COPYRIGHT: (C)2006,JPO&NCIPI