SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To write a desired data pattern in a parity cell array. SOLUTION: Regular data inpuutted/outputted to/from external data terminals DQ is read/written from/to a regular cell array CA1, and parity data is read/written from/to a parity cell array PCA. Since the parity data is generated by a parity generation circuit 16, it is difficult to write a desired pattern to the parity cell array PCA. The regular data and the parity data are exchanged with each other by a a switch circuit SW, so that the regular data can be written to the parity cell array PCA and the parity data can be written to the regular cell array CA1. Therefore, the desired data can be written in the parity cell array PCA, a test of the parity cell array PCA can be easily conducted. In particular, a leakage test or the like between memory cells can be easily conducted. COPYRIGHT: (C)2006,JPO&NCIPI