AUTOMATIC DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To improve the degree of freedom at the time of designing of a semiconductor integrated circuit in its entirety in a method of automatic design of the integrated circuit having a macro block. SOLUTION: A lower layer power source wire 11 and a lower layer grounding wire 12 are arranged on a hard macro 10 which is the macro block of the semiconductor integrated circuit by using the lowermost wiring layer of several wiring layers constituting the semiconductor integrated circuit. Then upper layer power source wires 41 and 51 and upper layer grounding wires 42 and 52 which come into contact with the lower layer power source wire 11 and the lower layer grounding wire 12 are arranged along the edges of the hard macro 10 by using either of the several wiring layers except the lowermost layer. Then a cell 10C is arranged in a region surrounded by the upper layer power source wires 41 and 51 and the upper layer grounding wires 42 and 52 of the hard macro 10. Then ports 20 are arranged at an edge of the hard macro 10 by using either of the wiring layers except the lowermost layer of the several wiring layers and the wiring layers of the upper layer power source wires 41 and 51 and the upper layer grounding wires 42 and 52. COPYRIGHT: (C)2006,JPO&NCIPI