CLOCK GENERATION APPARATUS AND CLOCK GENERATION METHOD

PROBLEM TO BE SOLVED: To accurately generate a system clock following reference time information of a received data stream in receiving digital broadcasting, and to generate a system clock with low jitter, high purity, and minimum variation in frequency in playback of the disk. SOLUTION: A clock gen...

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Bibliographische Detailangaben
Hauptverfasser: KATAOKA SATOSHI, KUWABARA MITSUTAKA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To accurately generate a system clock following reference time information of a received data stream in receiving digital broadcasting, and to generate a system clock with low jitter, high purity, and minimum variation in frequency in playback of the disk. SOLUTION: A clock generation apparatus is provided with a first PLL circuit (PLL1) generating a synchronizing clock (CK1) synchronizing with time reference information (PCR) from a data stream (MPEG2-TS), a oscillator (VXO) generating a fixed clock (CK3), a control part (25) outputting a clock switching signal, and a clock switching part (21g) switching and selecting the synchronizing clock and the fixed clock by the clock switching signal, and outputting the selected clock as a system clock. COPYRIGHT: (C)2006,JPO&NCIPI