SEMICONDUCTOR INTEGRATED CIRCUIT AND PICTURE PROCESSING SYSTEM

SEMICONDUCTOR INTEGRATED CIRCUIT AND PICTURE PROCESSING SYSTEM

PROBLEM TO BE SOLVED: To provide a circuit system in which throughput can be improved by avoiding providing system clocks of two systems and operation restriction that it must be synchronized to a slow system clock when an operation frequency of an associative memory is slower than an operation freq...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SAKAI MIKIKO, KOBA TAKASHI, ANAMI NAOYUKI, HIGETA KEIICHI, PARK SERYUNG
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a circuit system in which throughput can be improved by avoiding providing system clocks of two systems and operation restriction that it must be synchronized to a slow system clock when an operation frequency of an associative memory is slower than an operation frequency of a system LSI. SOLUTION: A clock control circuit (103) down-converting an internal clock (Φ1) of LSI (101) is provided and a control system operating an associative memory circuit (102) using a slowed control signal is provided. COPYRIGHT: (C)2006,JPO&NCIPI