CRITICAL PATH TEST METHOD, INTEGRATED CIRCUIT DEVICE, CRITICAL PATH TEST SYSTEM, AND METHOD FOR MANUFACTURING INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To provide a test method for an integrated circuit device and a critical path capable of measuring easily the maximum operation frequency by a true critical path. SOLUTION: In this integrated circuit device test method for the integrated circuit device, a critical path circuit...

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1. Verfasser: INAI HIROYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a test method for an integrated circuit device and a critical path capable of measuring easily the maximum operation frequency by a true critical path. SOLUTION: In this integrated circuit device test method for the integrated circuit device, a critical path circuit serving as the critical path is detected from the integrated circuit device, an inlet flip-flop is connected to an outlet flip-flop by a scan chain, a scan-in input is carried out in the outlet flip-flop under the first condition of a step for connecting an output circuit for outputting a value of the flip-flop to an outside, and a scan enable signal, prescribed values are set in the inlet flip-flop and the outlet flip-flop of a scan chain circuit, the scan enable signal is switched from the first condition to the second condition at timing when the prescribed values are set in the inlet flip-flop and the outlet flip-flop, and the outlet flip-flop is brought into a condition capable of setting an output of the critical path circuit, so as to detect whether the output value of the output circuit is inverted corresponding to the switching of the scan enable signal or not. COPYRIGHT: (C)2006,JPO&NCIPI