MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device improved in yield and reliability by obtaining an excellent coverage of a via hole and a wiring layer. SOLUTION: The method comprises: a process of forming a first metal layer 3 of a predetermined pattern on a semicond...

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1. Verfasser: SUNADA TAKESHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device improved in yield and reliability by obtaining an excellent coverage of a via hole and a wiring layer. SOLUTION: The method comprises: a process of forming a first metal layer 3 of a predetermined pattern on a semiconductor substrate 1; a process of forming a first insulating film 4 over the entire surface; a process of forming a second metal layer 5 of a predetermined pattern on the first insulating film 4 and further forming a third metal layer 6 on the second metal layer 5; a process of forming a second insulating film 7 on the third metal layer 6; a process of flattening the second insulating film 7; a process of forming a third insulating film 9 over the entire surface; a process of forming an antireflection film 10 on the third insulating film 9; a process of forming a resist layer on the antireflection film 10; a process of patterning the resist layer; a process of implementing etching using the patterned resist layer 11 as a mask to form opening parts 12, 13 reaching the second metal layer at a predetermined position; and a process of forming a fourth metal layer and a fifth metal film over the entire surface including the interior of the opening parts 12, 13. COPYRIGHT: (C)2006,JPO&NCIPI