MEMORY DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a memory device and its manufacturing method which facilitates adjusting the threshold voltage of the memory device by preventing the short channel effect, and reduces the junction leakage current generated in a storage node junction region to increase the data hold...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YANA KOUZEN, JANG SE AUG, PARK HYUNG-SOON, KIM WOO-JIN, HWANG EUNG-RIM, TEI DAIGU, KIM SEO-MIN, SOHN HYUNUL, KIM YOUNG-BOG
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a memory device and its manufacturing method which facilitates adjusting the threshold voltage of the memory device by preventing the short channel effect, and reduces the junction leakage current generated in a storage node junction region to increase the data hold time of the memory device. SOLUTION: The memory device comprises a semiconductor substrate (610) with a recess (600) formed therein, a first junction region (670A) formed on a surface lower part of the semiconductor substrate in the recess, a plurality of second junction regions (670B) formed on a surface lower part of the semiconductor substrate outside the recess, gate structures (655) formed on the semiconductor substrate between the first and second junction regions, including at least a part of the gate structure formed on the semiconductor substrate in the recess, a first contact plug (690A) formed on the first junction region by burying between the gate structures, and a plurality of second plugs (690B) formed on the second junction regions by burying between the gate structures. COPYRIGHT: (C)2006,JPO&NCIPI