METHOD FOR REDUCING STANDBY ELECTRICITY OF INTEGRATED CIRCUIT DEVICE, METHOD FOR OPERATING MEMORY ARRAY WITH CACHE OF INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To provide a method for power-down for a memory with a cache for reducing power by powering-down the cache and a tag array during a power-down mode. SOLUTION: A power-down function of the cache and a tag in a low power data retention and standby mode technology is for an integrated circuit memory device with the cache. Data in the cache is written back from the cache to a main memory array when entering power-down (writing back operation). Thereby, most part of the cache and tag, and a cache control logic can be powered down during a power-down standby mode. When exiting power-down standby, the cache and tag, and a control circuit are powered up, and when a tag clear sequence is executed, cache operation is enabled immediately. COPYRIGHT: (C)2006,JPO&NCIPI