LID FOR WAFER-SCALE PACKAGE AND ITS FORMING METHOD

LID FOR WAFER-SCALE PACKAGE AND ITS FORMING METHOD

PROBLEM TO BE SOLVED: To provide a method for improving the packaging of an optoelectronic device. SOLUTION: A method for forming a lid for a wafer-scale package has: a step of forming a cavity in a substrate; a step of forming an oxide layer on the cavity on the wafer and a bonding region in the ci...

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Bibliographische Detailangaben
Hauptverfasser: GALLUP KENDRA J, JOHNSON MARTHA, MATTHEWS JAMES A
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
DEVICES USING STIMULATED EMISSION
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
OPTICS
PHYSICS
SEMICONDUCTOR DEVICES
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a method for improving the packaging of an optoelectronic device. SOLUTION: A method for forming a lid for a wafer-scale package has: a step of forming a cavity in a substrate; a step of forming an oxide layer on the cavity on the wafer and a bonding region in the circumference of the cavity; a step of forming a reflection layer on the oxide layer; a step of forming a barrier layer on the reflection layer; a step of exposing a part of the reflection layer by etching a part of the barrier layer located on the bonding region; and a step of forming a solder layer on a part of the reflection layer. COPYRIGHT: (C)2006,JPO&NCIPI