LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD
PROBLEM TO BE SOLVED: To provide a laminate for a wiring substrate in which adhesiveness is made superior, electric resistance is made low, an etching speed is fast and etching performance and productivity are made superior, to provide a method to form the wiring substrate by etching the laminate an...
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creator | HIRUMA TAKEHIKO |
description | PROBLEM TO BE SOLVED: To provide a laminate for a wiring substrate in which adhesiveness is made superior, electric resistance is made low, an etching speed is fast and etching performance and productivity are made superior, to provide a method to form the wiring substrate by etching the laminate and to provide the wiring substrate. SOLUTION: The laminate for forming the wiring substrate is provided with a substrate layer which is formed on a substrate and is made of Mo as a major ingredient and does not include oxygen and/or nitrogen and a conductor layer which is made of Mo as the major ingredient and does not include oxygen and nitrogen. It is desirable to set a total amount of inclusion of oxygen and nitrogen in the substrate layer to be 5 to 50 atom%. COPYRIGHT: (C)2006,JPO&NCIPI |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2005308774A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2005308774A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2005308774A3</originalsourceid><addsrcrecordid>eNrjZPDzcfT19HMMcVVw8w8CYSDPXSHcMwhEBYc6BYcEASV1MEQUHP2CFTxDguFafF1DPPxdeBhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGBqbGBhbm5iaMxUYoAh44vIA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD</title><source>esp@cenet</source><creator>HIRUMA TAKEHIKO</creator><creatorcontrib>HIRUMA TAKEHIKO</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a laminate for a wiring substrate in which adhesiveness is made superior, electric resistance is made low, an etching speed is fast and etching performance and productivity are made superior, to provide a method to form the wiring substrate by etching the laminate and to provide the wiring substrate. SOLUTION: The laminate for forming the wiring substrate is provided with a substrate layer which is formed on a substrate and is made of Mo as a major ingredient and does not include oxygen and/or nitrogen and a conductor layer which is made of Mo as the major ingredient and does not include oxygen and nitrogen. It is desirable to set a total amount of inclusion of oxygen and nitrogen in the substrate layer to be 5 to 50 atom%. COPYRIGHT: (C)2006,JPO&NCIPI</description><edition>7</edition><language>eng</language><subject>ADVERTISING ; BASIC ELECTRIC ELEMENTS ; CRYPTOGRAPHY ; DISPLAY ; DISPLAYING ; EDUCATION ; ELECTRIC HEATING ; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LABELS OR NAME-PLATES ; LAYERED PRODUCTS ; LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM ; PERFORMING OPERATIONS ; PHYSICS ; SEALS ; SEMICONDUCTOR DEVICES ; SIGNS ; TRANSPORTING</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20051104&DB=EPODOC&CC=JP&NR=2005308774A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20051104&DB=EPODOC&CC=JP&NR=2005308774A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HIRUMA TAKEHIKO</creatorcontrib><title>LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD</title><description>PROBLEM TO BE SOLVED: To provide a laminate for a wiring substrate in which adhesiveness is made superior, electric resistance is made low, an etching speed is fast and etching performance and productivity are made superior, to provide a method to form the wiring substrate by etching the laminate and to provide the wiring substrate. SOLUTION: The laminate for forming the wiring substrate is provided with a substrate layer which is formed on a substrate and is made of Mo as a major ingredient and does not include oxygen and/or nitrogen and a conductor layer which is made of Mo as the major ingredient and does not include oxygen and nitrogen. It is desirable to set a total amount of inclusion of oxygen and nitrogen in the substrate layer to be 5 to 50 atom%. COPYRIGHT: (C)2006,JPO&NCIPI</description><subject>ADVERTISING</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>DISPLAYING</subject><subject>EDUCATION</subject><subject>ELECTRIC HEATING</subject><subject>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LABELS OR NAME-PLATES</subject><subject>LAYERED PRODUCTS</subject><subject>LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM</subject><subject>PERFORMING OPERATIONS</subject><subject>PHYSICS</subject><subject>SEALS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SIGNS</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPDzcfT19HMMcVVw8w8CYSDPXSHcMwhEBYc6BYcEASV1MEQUHP2CFTxDguFafF1DPPxdeBhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGBqbGBhbm5iaMxUYoAh44vIA</recordid><startdate>20051104</startdate><enddate>20051104</enddate><creator>HIRUMA TAKEHIKO</creator><scope>EVB</scope></search><sort><creationdate>20051104</creationdate><title>LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD</title><author>HIRUMA TAKEHIKO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2005308774A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>ADVERTISING</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>DISPLAYING</topic><topic>EDUCATION</topic><topic>ELECTRIC HEATING</topic><topic>ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LABELS OR NAME-PLATES</topic><topic>LAYERED PRODUCTS</topic><topic>LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM</topic><topic>PERFORMING OPERATIONS</topic><topic>PHYSICS</topic><topic>SEALS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SIGNS</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>HIRUMA TAKEHIKO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HIRUMA TAKEHIKO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD</title><date>2005-11-04</date><risdate>2005</risdate><abstract>PROBLEM TO BE SOLVED: To provide a laminate for a wiring substrate in which adhesiveness is made superior, electric resistance is made low, an etching speed is fast and etching performance and productivity are made superior, to provide a method to form the wiring substrate by etching the laminate and to provide the wiring substrate. SOLUTION: The laminate for forming the wiring substrate is provided with a substrate layer which is formed on a substrate and is made of Mo as a major ingredient and does not include oxygen and/or nitrogen and a conductor layer which is made of Mo as the major ingredient and does not include oxygen and nitrogen. It is desirable to set a total amount of inclusion of oxygen and nitrogen in the substrate layer to be 5 to 50 atom%. COPYRIGHT: (C)2006,JPO&NCIPI</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | ADVERTISING BASIC ELECTRIC ELEMENTS CRYPTOGRAPHY DISPLAY DISPLAYING EDUCATION ELECTRIC HEATING ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY LABELS OR NAME-PLATES LAYERED PRODUCTS LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM PERFORMING OPERATIONS PHYSICS SEALS SEMICONDUCTOR DEVICES SIGNS TRANSPORTING |
title | LAMINATE FOR FORMING WIRING SUBSTRATE, WIRING SUBSTRATE ANS ITS FORMING METHOD |
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