CHIP CAPACITOR MOUNTING STRUCTURE AND PRINTED WIRING BOARD

PROBLEM TO BE SOLVED: To reduce a power supply and ground noise caused by high performance and high frequency of a semiconductor device with a BGA package mounted on a printed wiring board, and to reduce a chip capacitor mounting area used for noise reduction. SOLUTION: As a mounting structure for c...

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Bibliographische Detailangaben
Hauptverfasser:	MATSUMOTO TAKASHI, KAWADA ATSUMI, TAKAHIRA MITSURU, MIZOE YUKIO, TSUNODA ATSUSHI, KAMISAKA AKIRA, ONO TAKAYUKI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION ORPROCESSING OF GOODS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
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Zusammenfassung:	PROBLEM TO BE SOLVED: To reduce a power supply and ground noise caused by high performance and high frequency of a semiconductor device with a BGA package mounted on a printed wiring board, and to reduce a chip capacitor mounting area used for noise reduction. SOLUTION: As a mounting structure for connecting a chip capacitor 3 by solder on the power source of the backside of the mounting place of a printed wiring board connecting the BGA package 1 by solder and a through-hole pad for ground, the circuit connection distance of the power source and the ground is made shorter than that in a conventional structure. Consequently, resistance and inductance of wiring can be reduced and the power source and ground noise can be reduced. Furthermore, since mounting of the chip capacitor on an area near the BGA package in a conventional structure is eliminated, an area required for chip capacitor mounting can be greatly reduced. COPYRIGHT: (C)2006,JPO&NCIPI