SIMULATION ANALYSIS SYSTEM, ACCELERATOR DEVICE AND EMULATOR DEVICE

PROBLEM TO BE SOLVED: To provide a simulation analysis system, an accelerator device and an emulator device, allowing easy comparison of verification results of a verified circuit by a programmable device and a CAD simulator, and capable of reducing a time required for cause specification of an oper...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HOSHI NAOYUKI, TOMIKAWA SEI, TANAKA SUSUMU
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a simulation analysis system, an accelerator device and an emulator device, allowing easy comparison of verification results of a verified circuit by a programmable device and a CAD simulator, and capable of reducing a time required for cause specification of an operation fault. SOLUTION: This simulation analysis system comprises: an FPGA 4 having the verified circuit 4 performed with writing, and performing operation verification of the verified circuit 4b by hardware; the CAD simulator 2 executing simulation of the verified circuit on a personal computer A1, and performing the operation verification of the verified circuit by software; a parallel operation control part 7 operating the FPGA 4 and the CAD simulator 2 in parallel while synchronizing them in each operation cycle when a verification result by the hardware and a verification result by the software differ from each other; and a display part 8 displaying output waveforms of the FPGA 4 and the CAD simulator 2 in each the operation cycle. COPYRIGHT: (C)2005,JPO&NCIPI