CONTROLLER
PROBLEM TO BE SOLVED: To provide a controller capable of reducing the capacity of a RAM to facilitate the cause investigation of a failure, and performing writing of data to a ROM with slow access time without impairing the ordinary computing performance of the controller, and dispensing with mounti...
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Format: | Patent |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To provide a controller capable of reducing the capacity of a RAM to facilitate the cause investigation of a failure, and performing writing of data to a ROM with slow access time without impairing the ordinary computing performance of the controller, and dispensing with mounting of a battery or super-capacitor that is a large-size part for backup of the RAM to reduce the size of the controller. SOLUTION: The controller comprises a CPU 11, a ROM 21 electrically rewritable and erasable, a RAM 22, a communication means 13 with a host device, and an input and output means with a control object, in which a failure or not is determined based on abnormal data of the control object to control it. When the abnormality data of the control object are detected, the abnormal data and time-series input and output data on and after the abnormal data detection time are recorded in the RAM as monitor data. COPYRIGHT: (C)2005,JPO&NCIPI |
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